Two architectures, one stack
From a lean entry point to a full transformer accelerator — both share the driver base and toolchain.
Vexon Light
A lean GEMM/matmul NPU with a scalable DMA data path. Robust and ready to deploy.
- Matrix multiplication + scalable DMA data path
- Proven and stable in operation
- Shared driver and toolchain base
Vexon-1 / Pro
The Light data path plus the five core innovations (three of them registered as utility models) — the full transformer accelerator.
- Sparse engine, adaptive precision, hardware attention, KV-Cache, multi-tile
- Verified in our own hardware (FPGA)
- The differentiated IP and licensing story
Same driver base, same toolchain — an upgrade path with no software break.
Performance — an honest assessment
Bit-exact DMA data path on two FPGA platforms, all five innovations in hardware, up to three tiles in parallel. As system context, the NPU runs end to end 4.6× faster than the four CPU cores of the same chip (realistically 2–3× against an optimised library). This is a reference point at 100 MHz on the FPGA, not a comparison with other NPU IP; the real compute performance only emerges in silicon.
Roofline model with 65% derating: ~50 tok/s (~14× over a CPU baseline) with LPDDR5. Clearly declared as a projection — not a measured silicon figure.
Which line fits your project?
Light for a fast start, Pro for the full IP depth — we'll advise you honestly.